In a recent mobile phone service, a demand for data communication in addition to a voice call is increasing, and hence improvement of the transmission speed is important. In the GSM (Global System for Mobile communications) system which is in widespread use mainly in Europe and Asia, for example, a voice call is conventionally performed by the GMSK modulation in which the phase of a carrier is shifted in accordance with transmission data. However, the EDGE (Enhanced Data rates for GSM Evolution) system has been proposed in which also data communication is performed by 3π/8 rotating 8-PSK modulation (hereinafter, abbreviated to 8-PSK modulation) in which bit information per symbol is enhanced by three times as compared with the GMSK modulation by shifting the phase and amplitude of a carrier in accordance with transmission data.
In a linear modulation system involving amplitude variation, such as the 8-PSK modulation, a request for linearity of a power amplifier of a transmitting portion of a radio apparatus is severe. Usually, the power efficiency in a linear region of a power amplifier is lower than that in a saturation region. When the related quadrature modulation system is applied to a linear modulation system, therefore, it is difficult to improve the power efficiency.
Therefore, a system which is called the EER method (Envelope Elimination & Restoration) or the polar modulation system, and in which improvement of the power efficiency of a power amplifier is realized by a linear modulation system is known (for example, see Non-patent Reference 1). In the system, a transmission signal is separated into a constant-amplitude phase signal and an amplitude signal, phase modulation is applied by a phase modulator on the basis of the constant-amplitude phase signal, a constant-amplitude phase-modulated signal having a level at which a power amplifier operates in saturation is input, and a control voltage of the power amplifier is driven at high speed, thereby synthesizing amplitude modulation. Hereinafter, in order to clarify that the modulation system is different from the quadrature modulation system, the system is referred to as polar modulation system.
FIG. 26 is a view which is obtained by extracting and plotting a 200 to 400 [μs] portion in one time slot (577[μs]) of the GSM relating to an amplitude signal in the 8-PSK modulation. In FIG. 26, the abscissa indicates the time elapsed after the start of the time slot, and the ordinate indicates the amplitude of the amplitude signal.
FIG. 27 is a view which is obtained by plotting passing phase characteristics in the case where a control voltage which is gradually changed (monotonically increased or decreased) with respect to the elapse of time is applied to a power amplifier. In FIG. 27, the abscissa indicates the normalized control voltage, and the ordinate indicates the passing phase rotation amount with reference to the normalized control voltage of 1. The solid line in the figure shows passing phase characteristics in the case where the normalized control voltage is gradually changed in monotonic increase from a low voltage (0) to a high voltage (1) (rising characteristic), and the broken line in the figure shows passing phase characteristics in the case where the normalized control voltage is gradually changed in a monotonic decrease from the high voltage (1) to the low voltage (0) (falling characteristic). Both the solid and broken lines show the case where an input high-frequency signal amplitude (the same value) having a level at which the power amplifier operates in saturation is supplied.
In the polar modulation system, a constant-amplitude phase-modulated signal is input to a power amplifier, and hence the power amplifier can be used at the saturation operating point. This is advantageous from the viewpoint of the power efficiency. In order to express an amplitude signal such as shown in FIG. 26 in which a point of pole inflection of the maximum value and the minimum value of the amplitude exists within 2 [μs], however, the control voltage of the power amplifier must be driven at high speed. Because of differences in charging and discharging tomes with respect to the capacitance (including the parasitic capacitance) in a control-voltage input portion of the power amplifier, even when the change width of the control voltage has the same value, the phase change amount is different in the cases where, as shown in FIG. 27, the conditions of application of the control voltage change from the low voltage to the high voltage, and where the conditions change from the high voltage to the low voltage. Namely, the phase characteristics change at the signal change point. Therefore, a technique for improving the output-response characteristics of the power amplifier with respect to the input control voltage (a technique for linearizing an output) is required.
Next, in the GSM system, the radius of a cell to be covered by a base station is large, and hence the specified value of the maximum transmission power for a mobile station transmitting apparatus is high. In order to reduce the power consumption of the mobile station transmitting apparatus, therefore, the transmission power of the mobile station transmitting apparatus is controlled in accordance with the distance between a base station and a mobile station. For example, FIG. 28 is a view showing a transmission power regulation for a mobile station transmitting apparatus. In the figure, the power control levels 5 to 31 in the case where a mobile station transmitting apparatus corresponding to the GSM 900 MHz band transmits an 8-PSK modulated wave are excerpt from power control levels of a transmission power regulation in uplink to a mobile station transmitting apparatus stipulated in GSM standard “Digital cellular telecommunications system (Phase 2+); Radio transmission and reception (3GPP TS 05.05 version 8.9.0 Release 1999)”. In the 8-PSK modulation, power classes E1 to E3 are maximum output powers, and a power control is performed on an output power which is equal to or lower than them.
In the polar modulation system, as means for performing the power control, usually, the control voltage of the power amplifier is adjusted so as to attain a desired output power.
In the polar modulation system, however, the amplitude of an input high-frequency signal to the power amplifier is set to be large so that the operating point of the power amplifier is in the saturation region. In the case where the output signal amplitude is suppressed by adjusting the control voltage, therefore, the depletion layer capacitance between the base and collector terminals of a transistor constituting the power amplifier is increased, and leakage components of the input high-frequency signal are increased. Due to the leakage components, there arise problems in that the output signal amplitude cannot be reduced to a predetermined value or smaller, and that the passing phase amount is largely changed.
Therefore, also a technique for linearizing the output of the power amplifier when the transmission power is reduced is required.
From the above, in the polar modulation system, a technique for compensating the nonlinearity of a power amplifier due to that the control voltage is driven at high speed, and that the transmission power is controlled by using a saturation power amplifier is required. Next, the related art relating to the compensating technique will be described.
(Related Art 1: Predistortion Type Distortion Compensating Technique in Quadrature Modulation System)
As a related art example of a technique for linearizing the output of a power amplifier in which a control voltage has a constant value and is in a steady state, there is a predistortion type in which amplitude and phase distortions occurring in the power amplifier under the above-mentioned conditions are previously measured, and correction using inverse characteristics of the distortion is previously performed on an input signal of the power amplifier, thereby obtaining an output signal amplitude and passing phase characteristics which are desired (for example, see Patent Reference 1).
FIG. 29 is a view showing output signal amplitude characteristics (AM-AM: Amplitude Modulation to Amplitude Modulation conversion) and passing phase characteristics (AM-PM: Amplitude Modulation to Phase Modulation conversion) with respect to an input high-frequency signal amplitude of a power amplifier in which a control voltage has a constant value and is in a steady state, and FIG. 30 is a block diagram showing a schematic configuration of a related predistortion type modulating apparatus described in Patent Reference 1. Hereinafter, irrespective of the kind of an input signal, for a change of an output signal occurring in accordance with a change of the input signal amplitude, a change of the output signal amplitude is referred to as AM-AM characteristics, and a change of the output signal phase is referred to as AM-PM characteristics.
In FIG. 29, the abscissa indicates the amplitude of the input high-frequency signal, the ordinate (left) indicates the amplitude of the output signal, and the ordinate (right) indicates the phase rotation amount (passing phase) of the output signal with reference to the input high-frequency signal. The solid line in the figure shows a graph which is obtained by plotting the AM-AM characteristics with respect to the input high-frequency signal amplitude, and the broken line in the figure shows a graph which is obtained by plotting the AM-PM characteristics with respect to the input high-frequency signal amplitude.
As shown in FIG. 30, the related predistortion type modulating apparatus has a memory 2901, IQ-signal correcting means 2902, and a quadrature modulator 2903. The memory 2901 stores the AM-AM and AM-PM characteristics with respect to the input IQ-signal amplitude.
Here, correspondence relationships between the AM-AM and AM-PM characteristics as shown in FIG. 29 with respect to the input high-frequency signal amplitude of the power amplifier, and the AM-AM and AM-PM characteristics with respect to the input IQ-signal amplitude will be described.
The output amplitude of the quadrature modulator 2903, i.e., the input high-frequency signal amplitude of the power amplifier which is not shown is changed in accordance with the input IQ signal (not restricted to have a constant amplitude) transmitted from a baseband signal generating portion which is not shown. Therefore, correspondence relationships between the input IQ-signal amplitude and the output signal amplitude of the quadrature modulator 2903 (the input high-frequency signal amplitude of the power amplifier) are obtained. Furthermore, the AM-AM and AM-PM characteristics as shown in FIG. 29 with respect to the input high-frequency signal amplitude of the power amplifier in which the control voltage has a constant value and is in a steady state are obtained. Such characteristics of a power amplifier can be easily acquired by using a network analyzer and the like, as described in “Measurement of AM/AM and AM/PM Characteristics” p. 63, paragraph 2.13.4 of Non-patent Reference 1.
Next, based on the AM-AM characteristics of the quadrature modulator 2903 with respect to the thus acquired input IQ signal amplitude, and the AM-AM and AM-PM characteristics of the power amplifier with respect to the input high-frequency signal amplitude which are acquired as described above, the AM-AM and AM-PM characteristics with respect to the input IQ signal are acquired. Then, the AM-AM and AM-PM characteristics are stored as the absolute values, or as a predetermined value (difference value) which is acquired by multiplying or dividing the input IQ-signal amplitude by a predetermined value and then normalizing the resulting value with the input IQ-signal amplitude so as to attain the absolute values.
In accordance with the input IQ signal, then, an amplitude/phase correction signal which becomes inverse characteristics of the AM-AM and AM-PM characteristics is output to the IQ-signal correcting means 2902. In the data stored in the memory 2901, the input IQ signal may be normalized with the maximum value of the amplitude component after polar coordinate conversion, and an address number may be assigned to each of predetermined amplitude steps.
The IQ-signal correcting means 2902 executes correction on the input IQ signal based on the amplitude/phase correction signal.
The quadrature modulator 2903 executes quadrature modulation based on a signal output from the IQ-signal correcting means 2902.
In this way, a modulated signal which is previously distorted in consideration of inverse characteristics of the input/output characteristics of a power amplifier is affected by actual amplitude and phase distortions occurring in the power amplifier so as to have an output amplitude and a phase which are desired, whereby the linearity can be improved.
(Related Art 2: Predistortion Type Distortion Compensating Technique in Polar Modulation System)
As a related art example of a technique for linearizing the output of a power amplifier in the polar modulation system in which the control voltage of a power amplifier does not have a constant value and is not in a steady state, and amplitude modulation is executed by driving the control voltage of a saturation power amplifier at high speed, there is a technique in which the anti-control voltage characteristics of the output signal amplitude and passing phase in a predetermined saturation power amplifier which are previously acquired, with respect to a predetermined input high-frequency signal amplitude are accumulated in a memory, and the memory is referred to execute predistortion type distortion compensation (for example, see Patent Reference 2).
FIG. 31 is a block diagram showing a related polar modulating apparatus to which the predistortion type distortion compensation described in Patent Reference 2 is applied.
As shown in FIG. 31, the polar modulating apparatus comprises: a power amplifier 3000; polar coordinate converting means 3001; a memory 3002; an amplitude controller 3005 which has amplitude information correcting means 3003 and amplitude modulating means 3004; and a phase-modulated signal generator 3008 which has phase information correcting means 3006 and phase modulating means 3007.
The polar coordinate converting means 3001 separates an IQ signal input from a baseband signal generating portion which is not shown, into an amplitude signal r(t) and a phase signal θ(t) having a constant amplitude.
The memory 3002 stores output signal amplitude characteristics and passing phase characteristics with respect to an input control signal of the power amplifier 3000 at a predetermined input high-frequency signal amplitude, and outputs an amplitude correction signal and a phase correction signal which become inverse characteristics of the power amplifier 3000, in accordance with the input amplitude signal r(t).
The amplitude information correcting means 3003 performs correction on the input amplitude signal r(t) based on the amplitude correction signal output from the memory 3002.
The amplitude modulating means 3004 drives at high speed the control voltage of the power amplifier 3000 based on an output signal of the amplitude information correcting means 3003.
The phase information correcting means 3006 executes correction on the input phase signal based on the phase correction signal output from the memory 3002.
The phase modulating means 3007 performs phase modulation based on an output signal from the phase information correcting means 3006.
Although not described in the specification of Patent Reference 2, the data to be stored in the memory 3002 are data in the absolute value format of the AM-AM and AM-PM characteristics in which the input high-frequency signal amplitude of the power amplifier in the abscissa of FIG. 29 is replaced with the input control signal amplitude, or a predetermined value (data in the format of a difference value) which, after the input control signal amplitude is multiplied or divided by the above-mentioned predetermined value, is normalized with the input control signal so as to attain the absolute value.
In this way, an amplitude-modulated signal and a phase-modulated signal which are previously distorted in consideration of inverse characteristics of the output characteristics of a power amplifier with respect to an input control signal are affected by actual amplitude and phase distortions occurring in the power amplifier so as to have an output amplitude and a phase which are desired, whereby the output-response characteristics (linearity) with respect to an input control voltage can be improved.
(Related Art 3: Technique for Improving Output-Response Characteristics with Respect to Input Control Voltage in Power Amplifier)
As a related art example of a technique for improving the output-response characteristics with respect to an input control voltage in a power amplifier, there is a technique in which the level of an input high-frequency signal to the power amplifier is controlled in conjunction with adjustment of the control voltage of the power amplifier, thereby suppressing overshoot of an output signal with respect to the control voltage (for example, see Patent Reference 3).
FIG. 32 is a view showing output signal amplitude characteristics of a power amplifier with respect to an input control voltage, and FIG. 33 is a block diagram showing means (transmission power controlling circuit) for improving output-response characteristics with respect to the control voltage in the related power amplifier described in Patent Reference 3.
In FIG. 32, the abscissa indicates the control voltage, and the ordinate indicates the output amplitude. As indicated by the broken line in the figure, when, at the same output amplitude, the amplitude of an input of the power amplifier is suppressed in the direction of the arrow, the sensitivity (inclination) of the output signal amplitude with respect to the control voltage is moderated.
As shown in FIG. 33, the transmission power controlling circuit comprises a variable-output amplifier 3201, a power amplifier 3202, a signal input terminal 3203, a signal output terminal 3204, a control terminal 3205 of the variable-output amplifier 3201, and a control terminal 3206 of the power amplifier 3202.
When, under conditions that the amplitude of an input high-frequency signal of the input terminal 3203 and an input voltage of the control terminal 3206 are constant, an input voltage of the control terminal 3205 is adjusted so that the amplitude of an output signal from the variable-output amplifier 3201 is suppressed, the sensitivity of the output amplitude of the power amplifier 3202 with respect to the control voltage can be suppressed because of the relationship of FIG. 32. When the input voltages of the control terminals 3205, 3206 are simultaneously adjusted, therefore, the sensitivity of the output signal amplitude with respect to the control voltage, for example, overshoot can be suppressed.
(Related Art 4: Technique for Compensating AM-PM Characteristics at Signal Change Point)
As a related art example of a phase compensating technique for compensating a change of the AM-PM characteristics at a signal change point of an input control signal of a power amplifier, there is a technique in which the output signal amplitude of the power amplifier is detected, the detection signal is differentiated to obtain a signal change point, and thereafter a synchronizing timing between an amplitude signal and a phase signal is adjusted in order to compensate a change of the AM-PM characteristics at the signal change point.
FIG. 34 is a block diagram showing a related apparatus for phase-compensating at a signal change point described in Patent Reference 4.
As shown in FIG. 34, the phase compensating apparatus comprises: the power amplifier 3000, digital-analog converting circuits 3301, 3302, a reference clock 3303, amplitude modulating means 3304, phase modulating means 3305, a change-point detecting circuit 3306, and delaying means 3307.
The digital-analog converting circuit 3301 converts an IQ signal (I, Q) in a digital format input from a baseband signal generating portion which is not shown, to an IQ signal in an analog format.
The digital-analog converting circuit 3302 converts an amplitude signal (r) in a digital format extracted from the IQ signal (I, Q) in a digital format by polar coordinate converting means which is not shown, into an amplitude signal in an analog format.
The reference clock 3303 supplies a clock signal which serves as a reference of the converting operation, to the digital-analog converting circuits 3301, 3302.
The amplitude modulating means 3304 drives at high speed the power source voltage of the power amplifier 3000 based on the amplitude signal in an analog format.
The phase modulating means 3305 produces a phase-modulated signal based on the IQ signal in an analog format, and outputs the signal to the power amplifier 3000.
The change-point detecting circuit 3306 differentiates the output signal of the power amplifier 3000, and then detects a signal change point based on the sign of the differentiation value.
The delaying means 3307 adjusts, at the signal change point detected by the change-point detecting circuit 3306, converting timings of the digital-analog converting circuits 3301 and 3302, i.e., synchronization between the amplitude signal and the phase signal which are extracted from the IQ signal.
In this way, synchronization between the amplitude signal and the phase signal is adjusted at the signal change point, whereby the phase change amount can be controlled.
When the delay amount is adjusted based on the sign of the differentiation value, therefore, the phase change amount at the signal change point can be controlled.
(Related Art 5: Technique for Improving Output-Response Characteristics of Power Amplifier when Transmission Power is Reduced, with Respect to Input Control Voltage)
As a related art example of a technique for linearizing the output of a power amplifier when the transmission power is reduced, there is a technique in which a variable-output amplifier is connected to a front stage of the power amplifier, and, when the output signal amplitude of the power amplifier is to be reduced, also the gain of the variable-output amplifier is reduced, so that the amplitude of an input high-frequency signal of the power amplifier is suppressed (for example, see Patent Reference 5).
FIG. 33 is a block diagram showing low-output linearizing means in the related power amplifier described in Patent Reference 5.
FIG. 35 is a view showing passing phase characteristics of a usual power amplifier with respect to a control voltage (steady state). In FIG. 35, the abscissa indicates the normalized control voltage, and the ordinate indicates the passing phase rotation amount with reference to the normalized control voltage of 1. The solid line in the figure shows passing phase characteristics in the case where an input high-frequency signal amplitude Pin of the power amplifier is Pin=P1, and the broken line in the figure shows passing phase characteristics in the case where input high-frequency signal amplitude Pin of the power amplifier is P1n=P2 (<P1). During measurement of the passing phase characteristics, Pin has a constant value.
As shown in FIG. 35, in order to suppress a change of the passing phase characteristics in a region where the control voltage is low, it is effective to reduce the amplitude of the input high-frequency signal of the power amplifier. Furthermore, reduction of the amplitude of the input high-frequency signal of the power amplifier is effective in suppression of a power of input high-frequency signal components leaking to the output terminal in the region where the control voltage is low.
Therefore, for example, a case where the input voltage of the control terminal 3206 is reduced and the output power of the power amplifier 3202 is reduced will be considered.
When the input voltage of the control terminal 3206 is lowered, it is possible to suppress the amplitude of the output signal from the variable-output amplifier 3201, i.e., the amplitude of the input high-frequency signal of the power amplifier 3202, and reduce leakage components of the input high-frequency signal, i.e., suppress the output signal amplitude to a predetermined value or less. Because of the relationship of FIG. 34, the change width of the passing phase amount during a low-output power period of the power amplifier when the control voltage is low can be suppressed.
Patent Reference 1: JP-A-61-214843 (FIGS. 3 and 10)
Patent Reference 2: JP-T-2004-501527 (FIG. 11)
Patent Reference 3: JP-A-5-152977 (FIGS. 1 and 4)
Patent Reference 4: JP-T-2002-530992 (FIG. 2)
Patent Reference 5: US 2002-0177420 A1 (FIG. 2)
Non-patent Reference 1: Kenington, Peter B, “High-Linearity RF Amplifier Design”, Artech House Pulishers (p. 162, FIG. 4.18)